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Computer – High Performance Computer Architecture

Curriculum

  • 1 Section
  • 40 Lessons
  • 10 Weeks
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  • Computer - High Performance Computer Architecture
    40
    • 2.1
      Introduction and Course Outline
    • 2.2
      Performance
    • 2.3
      Instruction Set Architecture
    • 2.4
      MIPS ISA Processor
    • 2.5
      MIPS ISA Processor (Contd.)
    • 2.6
      Pipelining Introduction
    • 2.7
      Instruction Pipelining
    • 2.8
      Pipeline Hazards
    • 2.9
      Data Hazards
    • 2.10
      Software Pipelining
    • 2.11
      In Quest of Higher ILP
    • 2.12
      In Quest of Higher ILP (Contd.)
    • 2.13
      Dynamic Instruction Scheduling
    • 2.14
      Dynamic Instruction Scheduling (Contd.)
    • 2.15
      Control Hazards
    • 2.16
      Branch Prediction
    • 2.17
      Branch Prediction (Contd.)
    • 2.18
      Dynamic Instruction Scheduling with Branch Prediction
    • 2.19
      Hardware Based Speculation
    • 2.20
      Tutorial – I
    • 2.21
      Hierarchical Memory Organization
    • 2.22
      Hierarchical Memory Organization (Contd.)
    • 2.23
      Hierarchical Memory Organization (Contd.)
    • 2.24
      Hierarchical Memory Organization (Contd.)
    • 2.25
      Cache Optimization Techniques (Contd.)
    • 2.26
      Cache Optimization Techniques (Contd.)
    • 2.27
      High Performance Computer Architecture
    • 2.28
      Main Memory Optimizations
    • 2.29
      Virtual Memory (Contd.)
    • 2.30
      Virtual Machines
    • 2.31
      Storage Technology
    • 2.32
      Storage Technology (Contd.)
    • 2.33
      Case Studies
    • 2.34
      Case Studies (Contd.)
    • 2.35
      Case Studies (Contd.)
    • 2.36
      Multithreading and Multiprocessing
    • 2.37
      Simultanoues Multithreading
    • 2.38
      Symmetric Multiprocessors
    • 2.39
      Distributed Memory Multiprocessors
    • 2.40
      Cluster, Grid and Cloud Computing
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Dynamic Instruction Scheduling (Contd.)
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